1. Field of the Invention
The present invention relates to a semiconductor device manufacturing system and a semiconductor device manufacturing method in which impurity profile information in the substrate of a semiconductor device to be manufactured is extracted (process simulation) by solving a diffusion equation of an impurity in the substrate, the electric characteristics of a semiconductor device by using the mobility model of carriers are evaluated on the basis of an impurity profile in the semiconductor substrate and the information of an device structure (device simulation), the manufacturing conditions for a semiconductor device having desired electric characteristics are determined on the basis of the evaluation result, and a semiconductor device is manufactured on the basis of the determined manufacturing conditions and, more particularly, to a technique which exactly predicts the electric. characteristics of a semiconductor device to be manufactured and determines the manufacturing conditions for the semiconductor device at a high accuracy to improve the yield of the process for manufacturing semiconductor devices.
2. Description of the Related Art
In recent years, with rapid progress of micropatterning of semiconductor integrated circuits, micropatterning of a MOSFET (Metal-Oxide Silicon Field Effect Transistor) which is one of semiconductor devices constituting an integrated circuit is rapidly advanced. From these backgrounds, a reduction in thickness of a gate oxide film in the MOSFET is further advanced.
On the other hand, in a recent MOSFET, in order to suppress a short channel effect generated in a semiconductor substrate, a gate electrode in which an n-type impurity is implanted is used for an n-type MOSFET (to be referred as an n MOSFET hereinafter), and a gate electrode in which a p-type impurity is implanted is used for a p-type MOSFET (to be referred to as a pMOSFET hereinafter). In this manner, an electrode structure in which the gate electrodes of the nMOSFET and the pMOSFET are set to the n-type and the p-type, respectively is called a dual gate electrode. In general, when a semiconductor device having a dual gate electrode is to be manufactured, first an impurity implanting process for forming a source-drain region is performed to a gate electrode region. Thereafter, an annealing process is performed to a semiconductor substrate such that activation of an impurity in the source-drain region and diffusion of an impurity to the entire gate electrode region are performed.
However, in the method for manufacturing a semiconductor device, when a reduction in thickness of the gate oxide film is advanced, the impurity implanted in the gate electrode passes through the gate oxide film to reach the semiconductor substrate, and a problem that device characteristics such as a threshold voltage of the semiconductor device considerably change is occurred.
For this reason, recently, in order to suppress an impurity from a gate oxide film into a semiconductor substrate and to prevent degradation of device characteristics, nitrogen is added into the gate oxide film, and the process for suppressing diffusion of the impurity in the gate oxide film into the semiconductor substrate. As methods for adding nitrogen into the gate oxide film, up to now, a method which forms an oxide film which does not contain nitrogen on the semiconductor substrate in advance, performs annealing in an atmosphere of a gas such as NO, N2O, or NH3, and introduces nitrogen into the gate oxide film, a method which nitrides and oxidizes a semiconductor substrate by using an NO2 gas or a gas mixture of N2O and O2, and the like are known.
However, a phenomenon that diffusion of an impurity in a gate oxide film is suppressed by introducing nitrogen into the gate oxide film has been apparent. However, up to now, any knowledge related a hidden mechanism in the nitride-oxide film forming process or the influence on a semiconductor substrate such as how to change an impurity profile state in a semiconductor substrate such as a source-drain region by the nitride-oxide film forming process, an influence on diffusion of an impurity in a semiconductor substrate by the thermal step to be performed later cannot be obtained.
For this reason, at present, it is very difficult to efficiently perform the nitride-oxide film forming process, and the yield of the steps in manufacturing a semiconductor device including the nitride-oxide film forming process is considerably small.
In order to solve these problems, evaluation of the nitride-oxide film forming step using a process/device simulation technique for predicting the electric characteristics of a semiconductor device by solving a physical equation is performed. However, as described above, at present, any knowledge related to the mechanism of nitride-oxide film formation or the influence thereof is not obtained. For this reason, the accuracy of the evaluation is very poor at present.
On the other hand, in a device simulation technique, as a model (e.g., see literature xe2x80x9cS. A. Mujtaba and R. W. Dutton, xe2x80x9cSemi-Empirical Local NMOS Mobility Model for 2-D Device Simulation Incorporating Screened minority Impurity Scatteringxe2x80x9d, in Proc. NUPAD, pp. 3-6, 1994.xe2x80x9d) for calculating a component obtained by ionized impurity scattering of local mobility of carriers in a MOS inversion layer, a functional model in which a component obtained by ionized impurity scattering of local mobility of carriers is in proportion to the xcex1th power of a local carrier density and is in inverse proportion to the xcex2th power of an impurity concentration is used. This model has a problem that experimental value of an impurity concentration in a wide area cannot be reproduced by one parameter set. More specifically, FIG. 1 is a graph showing a device simulation of a universal curve using the Mujtaba model and an experimental result. In FIG. 1, when the impurity concentration is about the 16th power to 17th power, the experimental result is almost equal to the simulation result. However, when the impurity concentration is the 18th power, the simulation result does not reproduce the experimental result at all. In this case, the condition in which the impurity concentration is the 18th power is generally seen in a micro-semiconductor device of a quarter submicron generation.
As described above, in a semiconductor device manufacturing system and a semiconductor device manufacturing method using a conventional process/device simulation technique, it is difficult to exactly predict the electric characteristics of a semiconductor device and to determine manufacturing conditions for the semiconductor device. For this reason, the yield of a process for manufacturing semiconductor devices, especially, the yield of a process for manufacturing semiconductor devices including a nitride-oxide film forming process cannot be easily increased at present.
The present invention has been made in consideration of the above circumstances, and has as its object to provide a semiconductor device manufacturing system which increases the yield of a process for manufacturing semiconductor device.
The present invention has been made in consideration of the above circumstances, and has as its another object to provide a semiconductor device manufacturing method which increases the yield of a process for manufacturing semiconductor devices.
The semiconductor device manufacturing system of the present invention comprises: insulating film determination unit for determining whether an insulating film is present on the substrate surface or not; in-insulating-film impurity concentration extraction unit for extracting the concentration of an impurity contained in the insulating film on the substrate surface; diffusion parameter determination unit for determining diffusion parameter values constituting the diffusion equation as a function of the concentration of the impurity contained in the insulating film; and in-substrate impurity profile extraction unit for extracting the impurity profile information in the substrate by solving the diffusion equation in which the diffusion parameter values are introduced.
Also, the semiconductor device manufacturing method of the present invention comprises the steps of: determining whether an insulating film is present on the substrate surface or not; extracting the concentration of an impurity contained in the insulating film on the substrate surface; determining diffusion parameter values constituting the diffusion equation as a function of the concentration of the impurity contained in the insulating film; and extracting the impurity profile information in the substrate by solving the diffusion equation in which the diffusion parameter values are introduced.
In the semiconductor device manufacturing system of the present invention, the model for calculating the component obtained by the ionized impurity scattering of the local mobility of carriers represents the relationship between the component obtained by the ionized impurity scattering of the local mobility of carriers, a local carrier concentration, and a local impurity concentration, and is a function type model expressing the relationship that a component obtained by ionized impurity scattering of an effective mobility of carriers is in proportion to an exponent of an average carrier concentration and is in inverse proportion to an exponent of an average impurity concentration.
Also, in the semiconductor device manufacturing method of the present invention, the model for calculating the component obtained by the ionized impurity scattering of the local mobility of carriers represents the relationship between the component obtained by the ionized impurity scattering of the local mobility of carriers, a local carrier concentration, and a local impurity concentration, and is a function type model expressing the relationship that a component obtained by ionized impurity scattering of an effective mobility of carriers is in proportion to an exponent of an average carrier concentration and is in inverse proportion to an exponent of an average impurity concentration.